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Graph Reduction Hardware Revisited

Posted on June 14, 2018

Categories: functional programming, FPGAs, Haskell, graph reduction

Rob gave a talk at the Adaptive Many-Core Architectures and Systems workshop (link), at the University of York, on future FPGA-based graph reduction architectures for accelerating non-strict pure functional programming languages such as Haskell.

The talk was also presented at Trends in Functional Programming (TFP) in Gothenburg, Sweden, on 13th June, 2018.