The Glasgow site are very pleased to announce that their paper describing a type-system for hardware interfaces was accepted to ECOOP 2019.
Modern Systems-on-a-Chip (SoC) are constructed by composition of IP (Intellectual Property) cores. There are well described interaction protocols for communication between IP Cores. However, there is a disconnect between the machine readable specification of these protocols and the verification of their implementation in known hardware description languages. Although tools can be written to address such a separation of concerns, such tooling is often hand written and used to check hardware designs a posteriori. We have developed a dependent type-system and proof-of-concept modelling language to reason about the physical structure of hardware interfaces respective to user provided descriptions. Our type-system provides correct-by-construction guarantees that the interfaces on an IP Core will be well-typed if they adhere to a specified standard.
More details will follow in the coming months, and also around the time of the conference.